Request for Information for Silicon/Germanium Epitaxial Wafers

This is a notice to request information from industry to help the U.S. Department of Commerce, National Institute of Standards and Technology (NIST) determine the availability and capability of businesses to provide Silicon/Germanium Epitaxial Wafers and the ability to quote at a firm fixed price. 

This notice is strictly to request information for market research purposes to help NIST determine the appropriate acquisition strategy for this requirement. This notice shall not be construed as a solicitation, an obligation, or commitment by NIST.

The NIST CHIPS Metrology program develops and advances cutting edge metrology capabilities for members of the US semiconductor manufacturing ecosystem.  This NIST conducted research program works with device manufacturers, tool vendors, materials suppliers, and other organizations to address critical metrology gaps to spur innovation within seven grand challenge areas. 

Silicon wafers with epitaxial layer of silicon and silicon/germanium are an essential item for modern semiconductor manufacturing.  Some manufacturers perform epitaxial growths in house while other film stacks can be purchased.  Wafer with specific compositions, thicknesses, and dopant levels, and supporting measurements are available at various wafer sizes and lot sizes. 

CHIPS Metrology researchers at NIST require high-quality epitaxial film stacks on silicon wafers.  Although we anticipate changes in the exact specifications of each wafer lot purchased, the general classes of wafer products can be well described. 

The anticipated contract includes base line items with full wafer specifications.  Additionally, there are optional line items where the exact specifications for lot size, layer count, thicknesses, and layer composition/doping will be specified upon ordering.  These slight variations in the wafers would include changes to and including:

Wafer composition- “Thin” doped Si on Si, “Thick” doped Si on Si, Isotopically enriched 28Si on Si, “Thin” Si and SiGe layers on Si, and “Thick” SiGe on buffered Si.    In addition to the wafer composition, the following configurable parameters could be adjusted: Substrate resistivity, Film stack, and lot size (minimum of 10 units each)- if exercised. 

The Specifications are attached to the Request for Information.  The government is seeking input from potential vendors on the requirement and the practicability of Firm-Fix pricing all of the listed line items.

The due date for response is Friday April 3rd, 1:00PM EST, 2026.   Responses should be emailed directly to erik.frycklund@nist.gov